JTAG is commonly associated with debugging and programming, but it offers much more.

While processors use JTAG for debug and emulation, and FPGAs/CPLDs use it for programming, JTAG's functionality goes beyond these uses. The four-wire JTAG communication protocol is primarily used for these tasks but also enables additional capabilities

Boundary Scan Register (BSR) for JTAG Testing

JTAG’s four signals form the Test Access Port (TAP), part of IEEE Standard 1149.1, initially developed for testing PCBAs. It allows testing without requiring extensive physical access or custom development. The Boundary Scan Register (BSR) is added to devices for JTAG testing, often referred to as boundary scan.

How XJTAG Uses JTAG for Board Testing

Boundary scan cells have two modes: functional and test. In test mode, they disconnect the device’s core from the pins, enabling easier control and monitoring of signals for testing. This simplifies test development as no device configuration is needed.

Boundary scan testing offers two main methods. The first, connection testing, provides coverage, especially for short circuit faults, based on JTAG device capabilities and the board’s logic. The second method expands coverage by using JTAG-enabled devices to interact with non-JTAG peripherals like DDR RAM and flash.