SEGGER Flasher Hub – High speed ISP gang-programming for mass production

SEGGER Flasher Hub – High speed ISP gang-programming for mass production

SEGGER Flasher Hub – High speed ISP gang-programming for mass production

SEGGER’s Flasher Hub controls up to 24 Flasher Compacts serving as individual channels for parallel, high-speed gang programming. Each channel can be configured to program a different device with a different firmware image.

All programming interfaces and flash memories supported by the connected Flasher Compacts can also be used and controlled via the Flasher Hub.

Using SEGGER’s “almost-anything programmer” Flasher Compact the Flasher Hub benefits from the extensive list of supported Flash memories and interfaces and the ultra-fast programming algorithms.

Lauterbach´s TRACE32 Provides Full Debug Support for Arm´s SMMU

Lauterbach´s TRACE32 Provides Full Debug Support for Arm´s SMMU

Lauterbach´s TRACE32® tools offer full debug support of Arm´s System Memory Management Unit (SMMU) which is available in most current Arm® Cortex®-A based SoCs. SMMUs are important building blocks in Arm based chips running virtualized systems, where multiple guest operating systems are managed by a hypervisor. They independently perform address translations from virtual to physical addresses for peripherals which are capable of performing Direct Memory Access (DMA).

Lauterbach´s TRACE32 tools allow convenient debugging of Arm SMMUs via the TRACE32 PowerView GUI, commands, and scripting. Users are provided with an easy to use and intuitive interface to the SMMU configuration. For debugging, they can view stream and sub-stream configurations, stage-1 and stage-2 page tables of the address translation, events and fault conditions as well as viewing SMMU registers and fields by name. Currently, MMU-400, MMU-401, MMU-500, and MMU-600 are fully supported with MMU-700 to follow shortly.

TRACE32 Debug and Trace Support for Arm´s First Armv9-Based Cores

TRACE32 Debug and Trace Support for Arm´s First Armv9-Based Cores

Lauterbach´s TRACE32® tools provide full debug and trace support for the first generation of Arm® cores based on the new Armv9 architecture.

Lauterbach added support for an Armv9-A big.LITTLE pair which includes the Arm Cortex®-A710 and the Cortex-A510. Further, they support the Cortex-X2, which is focused on mobile computing, designed for ultimate performance; and the Neoverse™ N2™ which is optimized for cloud-to-edge workloads and delivers best-in-class performance, efficiency and compute density.

MU-Thermocouple1 CAN FD – Temperature Measuring Unit with CAN FD Support

MU-Thermocouple1 CAN FD – Temperature Measuring Unit with CAN FD Support

The new measuring unit MU-Thermocouple1 CAN FD from PEAK-System transmits its temperature measurement data using the modern standard CAN FD. Depending on the product version, eight mini-connectors for thermocouples of the types J, K, or T are available for temperature measurement. The CAN communication is done via a D-Sub connector. The measuring unit supports the CAN FD standard with data bit rates up to 10 Mbit/s and is at the same time downward compatible to classic CAN 2.0 A/B.

With the MU-Thermocouple1 CAN FD, temperature measurement can be integrated directly into automotive test benches or industrial plants using CAN FD communication. A router for the conversion from CAN 2.0 to CAN FD is no longer necessary. With support for the extended operating temperature range of -40 to 85 °C and due to its robust aluminum casing, the measuring unit can also be used in harsh environments.

The configuration of data processing, CAN communication, and LED indication is generated with a user-friendly Windows software and then transferred via CAN to the MU-Thermocouple1 CAN FD. Several devices can be operated and configured independently on a single CAN bus.

Lauterbach´s TRACE32® now supports i.MX RT500 crossover MCUs from NXP® Semiconductor

Lauterbach´s TRACE32® now supports i.MX RT500 crossover MCUs from NXP® Semiconductor

Lauterbach extends the range of supported processor architectures to include i.MX RT500 family crossover MCUs from NXP Semiconductors.

i.MX RT500 crossover MCUs contain an Arm® Cortex®-M33 core in combination with a built-in Cadence® Tensilica® Fusion 1 DSP processor, both running at frequencies of up to 200 MHz. The new chip family offers a variety of on-chip security features, which make it ideal for use in applications which require extra protection.

New PowerTrace III and Mixed-Signal Probe

Lauterbach GmbH launches new PowerTrace III and Mixed-Signal Probe to enhance customer debug experience

Lauterbach GmbH announces the launch of its new high-end trace tool, the PowerTrace III, accompanied by the new Mixed-Signal Probe, a high-performance hybrid tool to probe digital and analog signals. With this new tool set, Lauterbach again pushes the boundaries of the debug experience on microcontroller systems.

So far, the PowerTrace III is the best trace tool in Lauterbach’s portfolio. The long-lasting tool follows the product philosophy in terms of modularity and backward compatibility. It is architecture independent, expandable and future-proof.

Both products will be available from the first of April 2021 on.

Lauterbach joins Arm Functional Safety Partnership Program

Lauterbach joins Arm Functional Safety Partnership Program to help improve software safety

Lauterbach, the world’s leading debug tools provider, is pleased to announce their participation in the Arm Functional Safety Partnership Program in the Software and Tools category. The Arm Functional Safety Partnership Program is designed to distinguish experts in a given field within the Arm ecosystem so that customers can more easily find the resources and expertise they need to build better embedded systems. The aim is to promote the design of safe and secure Arm-based systems, an increasing concern as embedded systems become more ubiquitous and affect more of our lives.

Cantata Test Architect Webinar

Cantata Test Architect Webinar

Cantata Test Architect enables you to rapidly isolate and remediate architectural issues. It gives software engineers a fast and visual way to represent an application’s structure with its unique Dependency Structure Matrix. This gives insight into how different software layers interact and can identify test surfaces to help exercise the code and achieve your coverage goal when working towards industry standards.

In this introductory online presentation, Adam Mackay the Integrations Manager of QA Systems in the UK, introduces the Cantata Test Architect Webinar.

Using Cantata Test Architect Adam shows how to break down a complex system into its component parts, identify dependencies, and plan distinct sub-projects – easing the burden of test set-up.

I/O with CANopen and CANopen FD for Industrial Use

I/O with CANopen and CANopen FD for Industrial Use

In cooperation with the partner Embedded Systems Academy (EmSA), PEAK-System has developed an I/O device with CANopen and CANopen FD connection. The PCAN-MicroMod FD DR CANopen Digital 1 has 8 digital inputs and 8 digital outputs and is delivered in a DIN rail housing with Phoenix screw terminal strips.

The inputs comply with the PLC standard DIN EN 61131-2 and have a Type 3 characteristic; they are galvanically isolated in two groups up to 100 V from the device supply.

The digital outputs on high-side switch basis can each be loaded up to 500 mA. Mechanisms such as thermal protection, short-circuit detection, and open-load detection increase the reliability of the outputs.

The Node ID and bit rates are set via rotary switches. This allows the device to be set up for use in new CANopen FD and classic CANopen networks without additional configuration software. CANopen conformity has been tested and certified by the CAN in Automation (CiA) association.

The device conformity test and certification for CANopen FD® is pending.

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